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Reserve room for a whole vector in VecWriter with simd - #387

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Kerollmops merged 3 commits into
RoaringBitmap:mainfrom
emschwartz:vecwriter-simd-reserve
Oct 27, 2026
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Kerollmops merged 3 commits into
RoaringBitmap:mainfrom
emschwartz:vecwriter-simd-reserve

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Stacked on #385: only the last commit is new.

With simd, VecWriter::visit_vector appends all eight lanes and then truncates to the ones that matched. A vector write within eight slots of the reserved capacity therefore grows the Vec even though the output fits, and into_inner does not shrink it. Intersecting 500 values with a superset of 4000 reserves 500 and returns a Vec with capacity 1000.

Reserving eight extra slots under simd avoids the regrow. The added test fails without it. This is about memory, not speed: over 3 runs on the machines from #385, timings were within 1% of that PR.

Authored with Claude (claude-opus-5-5).

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Hey @emschwartz 👋

Thanks for the contribution. However, you'll have to rebase over #385 👍

Have a nice week 🌵

@emschwartz
emschwartz force-pushed the vecwriter-simd-reserve branch from 8ae7305 to 7664a0c Compare October 26, 2026 18:35
@Kerollmops
Kerollmops force-pushed the vecwriter-simd-reserve branch from 5b3e0a6 to 9f21514 Compare October 27, 2026 13:15
emschwartz and others added 3 commits October 27, 2026 14:18
`visit_vector` appends all eight lanes and then truncates to the ones
that matched, so a write near the end of the reserved space grows the
Vec even though the output fits. Intersecting 500 values with a
superset of 4000 reserves 500 and returns a Vec with capacity 1000,
and `into_inner` does not shrink it.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Upstream made SIMD unconditional, so `#[cfg(feature = "simd")]` never
matched and the extra capacity and its test were compiled out.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01XGMzezWxjMNNrZCr1oDKCz
The vector algorithms only call `visit_vector` when both inputs hold a
whole vector, so an output bound under 8 never needs the padding. Adding
it anyway moves a 5-value result into a larger allocation size class,
which made `ArrayStore -= &ArrayStore` on 5-value arrays take 105ns
instead of 60ns.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01XGMzezWxjMNNrZCr1oDKCz
@Kerollmops
Kerollmops force-pushed the vecwriter-simd-reserve branch from 9f21514 to 7615340 Compare October 27, 2026 13:20
@Kerollmops
Kerollmops added this pull request to the merge queue Oct 27, 2026
Merged via the queue into RoaringBitmap:main with commit 335d23f Oct 27, 2026
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3 participants