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I2C async refactor - #12108
I2C async refactor#12108error414 wants to merge 20 commits into
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…x, LPS25H and 2SMPB
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PR Summary by QodoMake periodic I2C transfers non-blocking across sensors and OLED
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Code Review by Qodo
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I tested this on two F722 boards with a DPS310 on I2C1, which covers the STM32F7 HAL line of your list: a Flywoo GOKU F722 Pro V2 (target FLYWOOF722PRO) and a Diatone Mamba F722 2022B (MAMBAF722_2022B), both flashed with 9a2da45. A DPS310 read as an SPL06. On maintenance-10.x,
BARO task ( I2C on the F7 HAL path. The error count at boot is the same with and without this PR (50 to 60, from the probes) and does not grow: still 50 after 133 s and 88 s on the Flywoo. The baro altitude at rest updates at the normal rate with the same noise as on 10.x. Everything else works as on 10.x: gyro on SPI, MAX7456 OSD, blackbox on the W25Q128 flash, the M10 GPS on the Flywoo and the CRSF receiver on the Mamba. Size. On F722 targets, which are close to full: FLYWOOF722PRO +5,508 B (to 99.28 %), MAMBAF722_2022B +5,888 B (to 99.68 %, about 1.6 KB left). Not tested: a magnetometer or another device on the same I2C bus, and flight. |
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cool, thanks you very much for testing. Seems that proof of concept works. About SPL06 and DPS310, these baros have identical address and registers, @Raffi1202 made some changes there in #11906 these changes are in this branch but was quite tricky to merge it. i will have to look at that closelly. Errors during boot should be unchanged, detect and init is done by old way, sync. There would not be benefit to make it async. I would like to reduce complexity as low as possible. I'm glad that SPI is untouched and other devices works. |
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RAM / Flash usage vs. base commit
See RAM/flash optimization guide for techniques to reduce usage. |
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Test firmware build ready — commit Download firmware for PR #12108 251 targets built. Find your board's
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It looks like this and #12063 and covering the same issue? It may be useful to cross-reference and see if each PR offers any different that may be useful. Having not read the code yet, my prediction would be that the two differ in some ways and a combination would be best. |
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I answered the same question on #12063, comparing the two: #12063 (comment) |
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will be solved in diferent PR |
I created PR to track progress, if anybody would interested.
In Inav is I2C sync, it means that all i2c calls waits for response. For 16bit register it's approx 100us, it's event worse in OLED driver, there can be blocking for 10ms and more. It blocks PID loop and creating dshot frames.
Async call in this PR uses state machine, send request and in next cycle check response.
Probably I would need help with testing. Lot of HW for test,
I2C back-ends (per MCU)
bus_i2c_stm32f40x.c, new IRQ engine ported from BF) – never ran on hardware, e.g. SPEEDYBEEF405V4. Highest prioritybus_i2c_hal.c) – H743 verified with baro + mag onlybus_i2c_hal.c)bus_i2c_at32f43x.c) – address phase still blocks ~70 µsbus_i2c_rp2350.c, FIFO + IRQ engine)bus_i2c_soft.c, synchronous fallback)Baro
up_delay + 1 msup_delay20 ms instead of 1 ms pollingMag
Pitot
Rangefinder
Other I2C
busIsBusy(dev, NULL)), regression check of loggingCross-cutting scenarios
tasks: BARO / COMPASS max µs, no DSHOT gapsdebug_mode = I2Cstatistics