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Sync master (0.2.28) into develop - #421
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Invert the BMI270 accelerometer and gyroscope X axes in the CoreP4X board mapping. Keep the existing Z inversion and user axis-order handling. (cherry picked from commit e5494bf)
On the internal 8-bit DAC (M5Stack Core), two steps were audible around every sound: - End: the hold level and the half-cosine ramp to 0 were written as whole DAC steps. At the default volume the bias is only a few steps, so the ramp became a staircase of 1-LSB clicks. The hold level and both ramps now carry the fraction below one step per sample, like the playback path does. The ramps use a smoothstep curve in integer math instead of cosf per sample. - Start: after about 85 ms of silence I2S was stopped and the DAC disabled; restarting them stepped the DAC output by about 40 mV before the next sound. On the DAC, I2S now keeps running at the zero level for about a second before it is stopped, so pauses inside a melody or between key clicks no longer stop it. A sound after a longer silence still steps once. When end() wakes the task during that second, the rising ramp of a fixed dac_zero_level is skipped, so the pin does not jump to the bias just before it is pulled low. External I2S DACs and the buzzer output are unchanged. (cherry picked from commit 0ecbc0c)
Module Display, Unit OLED / MiniOLED / GLASS / GLASS2 / LCD, Module RCA and Unit RCA were initialized with init() regardless of cfg.clear_display, so they were reset and cleared even when the sketch asked to keep the display (m5stack/M5GFX#370). They now follow the flag like the internal display and Unit PoE-P4: init() when it is true, init_without_reset(false) otherwise. The default is unchanged. (cherry picked from commit 2dc8542)
begin() set CHGEN on every board. ToughC5 has a CR2032 primary cell on VBAT with no series resistor, so M5.begin() enabled charging of a non-rechargeable cell. CHGEN is now a constructor option (default off), set per board in RTC_Class::begin(): on for boards whose VBAT holds something chargeable (Tab5: supercapacitor, StamPLC: rechargeable cell, both through 1 kOhm; StopWatch / PaperMono: capacitor), off for ToughC5 and for boards whose backup is unknown. begin() clears the bit explicitly, because it survives on VBAT after an earlier firmware set it. INIEN stays on for every board (the datasheet sets it for both cell types).
On Tab5 the interrupt output of the built-in RX8130 is connected to the power management controller. Periodic timer IRQs are not supported there. - The built-in RX8130 on Tab5 is created with periodic timer IRQs disabled. A positive period passed to setTimerIRQ(), through M5.Rtc or the driver, stops any running timer and returns 0. setTimerIRQ(0) still stops the timer. - Power::timerSleep(int seconds) returns without sleeping on Tab5. Use timerSleep(time) or timerSleep(date, time) instead. RX8130 (all boards): - begin() stops the periodic timer. The IRQ flags are kept for getIRQstatus(). - disableIRQ() also stops the periodic timer and reads the registers back to check it. - setAlarmIRQ() keeps the alarm interrupt disabled while the alarm registers are written, and clears the alarm flag before enabling it. Power::timerSleep(time) and timerSleep(date, time) (all boards) now return without sleeping when no RTC is available or the RTC driver reports that the alarm could not be set.
Release 0.2.28
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Merges the 0.2.28 release (master) back into develop. Conflicts were resolved on the develop side; the only net change against develop is the version bump (4 files). Please merge with "Create a merge commit" (not squash / rebase) so that master stays an ancestor of develop.